Lecture 04 (Sept 28) Static timing analysis

Lecture slides

Assignment slides [by Brendan / Cesare / Elif / Kundan]

Assignments:

• Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations, ICCAD'03 (Kundan)
• Incremental timing analysis, US Patent 5508937 (Cesare)
• Cadence SignalStorm (Elif)
• Synopsys PrimeTime (Brendan)

More readings:

• The Transient Response of Damped Linear Networks with Particular Regard to Wideband Amplifiers, J. Ap. Phy.'48.
• Signal Delay in RC Tree Networks, TCAD'83
• Timing Analysis and Performance Improvement of MOS VLSI Designs, TCAD'87.
• The Impact of Signal Transition Time on Path Delay Computation, TCAS-II'93.
• The Elmore Delay as a Bound for RC Trees with Generalized Input Signals, TCAD'97.

Lecture 05 (Oct 5) Projects Overview

projects overview presentations

Lecture 06 (Oct 12) Power Analysis and Reductions

Lecture slides

Assignment slides [by Elif / Nuno / Yiwen]

Assignments:

• Short-Circuit Dissipation of Static CMOS Circuitry and its impact on the design of Buffer Circuits, JSSC'84. (Elif)
• Adaptive Body Bias forReducing Impacts of Die-to-Die and within-dir parameter variations on up frequency and leakage, JSSC'02. (Nuno)
• Wattch: A Framework for Architectural-Level Power and Analysis and Optimizations, ISCA'00. (Yiwen)

More readings:

• Leakage Current Mechanisms and Leakage Reduction Techniques in Deep-Submicrometer CMOS circuits. IEEE'03.
• Interconnect-Power Dissipation in a Microprocessor, SLIP'04.
• Transistor Sizing for High Performance and Low Power, CICC'97.
• Runtime Mechanisms for Leakage Circuit Reduction in CMOS VLSI CIrcuits, ISPLED'02

Lecture 07/08 (Oct 19/26) Layout Techniques: Floorplanning and Placement

Lecture slides

•More readings:

Lecture 09 (Nov 2) Interconnect and Clock Trees

Lecture slides

Lecture 10 (Nov 9) Guest Lecture and Projects Overview

Guest lecture by Prof. Alex Zaslavsky on tunneling devices

Project Presentations

Lecture 11 (Nov 16) Routing

Lecture slides

Assignment slides [by Kundan/Brendan/Yiwen]

Assignments:

• Track Assignment: A Desirable Intermediate Step Between Global Routing and Detailed Routing, ICCAD'02.
• A Diagonal-Interconnect Architecture and Its Application to RISC Core Design, ISSCC'02.
• BoxRouter: A New Global Router Based on Box Expansion and Progressive ILP, DAC'06.

More readings:

• General River Routing Algorithm, DAC'83.
• A Survey on Multi-net Global Routing for Integrated Circuits, VLSI Integration'01.

Lecture 12 (Nov 30) Repeater Insertion