Class

Useful links

ENGN1640 - Spring '14: Design of Computing Systems

  • Instructor: Prof. Sherief Reda (SCALE lab)
  • Meeting Times: TuTh 01:00 - 2:30 at B & H 159.
  • Office Hours: Mon 12:00 - 12:30 pm & 3:00 - 4:00 pm and Th 3:00 - 4:00 pm (either in office 349 or lab 196).
  • TA: Xin Zhan. Lab hours: 3:30 pm to 5:00 pm every week day.

ABET form

Syllabus and class logistics

Lectures:

You can access the videos of the lectures at Brown Streaming Server. You need to use your Brown username/password to access them.
  1. Overview (1/23)
  2. Introduction to Quantitative Analysis (1/28, 1/30)
  3. Lab Foundations (2/4, 2/6, 2/11, 2/13)
  4. Instruction Set Architecture Design (2/20, 2/25, 2/27)
  5. Single-Cycle Processor Design (3/4, 3/6)
  6. Pipeline Processor Design (3/11, 3/13, 3/18, 3/20)
  7. Memory Subsystem Design (4/1, 4/3, 4/10, 4/15, 4/17, 4/22)
  8. I/O Subsystem (4/24)
  9. Parallel-processor design: SIMD, superscalar, multi-threaded and multi-cores (4/29, 5/1)

HWs:

  1. HW1. Due Date Tuesday Feb 4th.
  2. HW2. Due Date Tuesday March 18th.
  3. HW3. Due Date Tuesday April 1st.
  4. HW4. Due Date Tuesday April 15th.
  5. HW5. Due Date Tuesday April 22nd.
  6. HW6. Due Date Tuesday April 29st.
  7. HW7. Review HW. Due Date May 12th.

Labs:

  1. Lab01 (combinational circuit design). Follow Tutorial 1 and 2 before working on the lab. Due date Fri Feb 14.
  2. Lab02 (sequential circuit design). Follow Tutorial 3 before working on the lab. Due date Tu Feb 25.
  3. Lab03 (stack processor + MIPS assembly). Due date Friday Mar 7.
  4. Lab04 (single-cycle MIPS design).Due date Friday April 4th (& Mar 21).
  5. Lab05 (pipeline MIPS design). Due date Friday April 18 and April 25.
  6. Lab06 (memory and I/O). Due date Friday May 9. See Resouces Below.

You will be using the following tools in the class.